May 28, 2026

Intel Reportedly to Adopt Silicon Capacitors in 2027 to Improve EMIB Power Stability Intel's EMIB packaging gains momentum as TSMC CoWoS shortages persist, with Google, Meta and Amazon eyeing adoption. Intel plans mass silicon capacitor deployment in 2027 to improve AI chip power delivery and accelerate related supply-chain demand. TrendForce

Sponsor Automated X-Ray Metrology: Enhancing Quality and Efficiency in Wafer and Panel-Level Applications This paper explores how, with chips becoming smaller and mightier, automated x-ray metrology delivers game-changing quality and efficiency in wafer and panel level applications, while delving into industry trends. Nordson Test & Inspection

Junctionless Transistors Show a New Path to 3D Chips University of Illinois researchers developed monolithic 3D silicon chips using low-temperature roll-transfer printing and junctionless transistors. The approach enables densely stacked, aligned circuits with MOSFET-level performance and advances scalable, energy-efficient computing. IEEE Spectrum

Alpha Particle Emissions: An Overlooked Risk for Soft Errors in Advanced Packaging As advanced packaging density increases, alpha particle emissions present a growing reliability risk. This article examines soft error mechanisms and solutions to mitigate failures in AI, HPC, and high-density packages. Technical Paper

Sponsor Epoxy & Adhesive DIE Bonding One of the most common methods of creating a connection between chip and substrate is the gluing process. Extreme precise epoxy & adhesive bonding processes for sustainable bonds. Tresky Automation

Broadcom Partners With FuriosaAI on 2nm AI Chip Reportedly Made by TSMC; Sampling Expected in 1H28 FuriosaAI and Broadcom will jointly develop a next-gen AI inference chip and infrastructure, combining NPU and Ethernet technologies to challenge NVIDIA dominance. The KRW 200 billion partnership targets rack-scale clusters and 2nm HBM4 accelerators. TrendForce

TSMC Reportedly Eyes Up to 15% 3nm Price Hike in 2H26, Further 5%–10% Seen in 2027 Amid AI, ASIC Demand AI-driven demand is pushing TSMC's 3nm capacity to the limit, prompting reported price hikes of up to 15% in late 2026. NVIDIA, AMD, Google, AWS, and cloud ASIC growth continue fueling wafer demand far beyond current expansion plans. TrendForce

Sponsor Seam Seal Data Collection Robotic Cover Sealer (RCS) is a fully digital, automated seam seal process using AI. Complete data is provided on each package and lid. MicroCircuit Laboratories LLC

Technical Papers Automated X-Ray Metrology: Enhancing Quality and Efficiency in Wafer and Panel-Level Applications Alpha Particle Emissions: An Overlooked Risk for Soft Errors in Advanced Packaging Revolutionizing IC Packaging with High-Density RDL Technology EOTPR Fine pitch probing for die-to-die interconnect failure analysis in chiplet devices Die-on-Tab for Compound Semiconductors: Enabling Advanced RF Power Systems Package Assembly Design Kits: The Future of Advanced Package Design Novel Molded FCBGA Package Platform For Highly Reliable Automotive Applications MORE TECHNICAL PAPERS

Sponsor Cleaning Silicone and Hydrocarbon Residue Using Atmospheric Plasma Residue from dicing tape and silicone trays can hinder chip bonding. ONTOS effectively cleans surfaces before bonding. Read more. Ontos

TSMC might raise bonuses more than 30%, source says TSMC chairman C.C. Wei told employees bonuses could rise over 30 percent this year, matching record profits and past gains. He reassured staff amid rumors of cuts, emphasized employee care, and highlighted social responsibility and profit-sharing priorities. Taipei Times

Nvidia CEO touts surge in spending in Taiwan Nvidia CEO Jensen Huang said the company's Taiwan spending has surged to about $150 billion annually, highlighting the island's AI hub role. He plans major hiring expansion and a new Taipei headquarters, stressing energy needs and ecosystem growth. Taipei Times

Sponsor Openair-Plasma for Semiconductor Manufacturing Openair-Plasma for semiconductor production is an alternative to vacuum plasma. Typical apps are wire bonding, die bonding & pre-molding. Download here. Plasmatreat GmbH

Necessity is the Mother of Invention: Huawei Replaces Moore's Law With Her's Law At IEEE ISCAS 2026 in Shanghai, Huawei president He Tingbo unveiled Her's Law as an alternative to Moore's Law, pushing 3D stacking LogicFolding and τ scaling to bypass EUV sanctions, targeting 14Å-equivalent performance by 2031 through hybrid bonding advances. EE Times

Curvilinear Masks Push The Limits Of Inspection And Metrology Semiconductor Engineering gathered experts from D2S, Micron, HJL Lithography and Synopsys to examine future photomask challenges, focusing on lithography complexity, manufacturing limits and evolving design demands driving next-generation semiconductor production. Semiconductor Engineering

Sponsor Eliminating Interfacial Delamination in High-Power Automotive Devices This study demonstrates that coating power devices with APTES adhesion promoter after wire bonding eliminates interfacial delamination, providing a simpler alternative to lead frame roughening technology. Amkor Technology

China adds AI chips to secure technology assessment list amid US curbs China added AI chips to its "secure and reliable" assessment list, expanding its domestic replacement strategy and accelerating substitution of foreign hardware. The move guides gov't procurement and boosts demand for homegrown AI computing under US export controls. South China Morning Post

US to build first quantum wafer foundry with IBM to scale next-gen computing The United States partners with IBM and the Department of Commerce to launch Anderon, a $2 billion quantum wafer foundry in Albany, aiming to scale 300-millimeter fabrication and standardize quantum hardware production for industrial-level quantum computing. MSN

Sponsor Turnkey Electroless Plating Solutions PacTech delivers precision electroless plating with PACLINE® and turnkey process transfers, trusted by IDMs worldwide for advanced semiconductor manufacturing success. PacTech

Huawei Touts Chip Breakthrough to Close TSMC Gap Huawei claims a new LogicFolding approach to narrow its gap with TSMC, aiming for 1.4-nanometer chips by 2031, while TSMC targets 2028. The company says it will boost performance without EUV equipment, starting with Kirin chips this fall. Taipei Times

Sponsor Full automation bond testers A Sigma eliminates human error and comes with game-changing automation capabilities, robotic handlers, and smart vision cameras for operator-free bond testing and analysis. Learn more. xyztec