Nov 13, 2026 IP Integration Challenges Evolve Semiconductor firms face rising IP integration risks as complex SoCs, chiplets and power demands challenge designs. Experts urge stronger specifications, cross-block verification, better IP management and AI-assisted testing to prevent costly system failures. Semiconductor Engineering

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Rethinking Memory For AI Inference AI edge inferencing drives demand for memory architectures that reduce data movement, power consumption and latency. Processing-in-memory and near-memory computing boost performance, efficiency and support physical AI applications. Semiconductor Engineering

Why Metal TIM Warpage Simulations Fail—and How to Fix Them This study shows why metal TIM warpage simulations often fail when using bulk material properties and demonstrates that rheometer-derived film measurements significantly improve accuracy, reliability, and the optimization of high-performance package designs. Technical Paper

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Jensen Resigns Over Second Affair Jensen Huang's reported affairs have triggered his resignation as Nvidia CEO, ending a 33-year leadership that transformed the company into a $4 trillion AI powerhouse. Nvidia now faces the challenge of finding a successor and separating its brand from Huang's legacy. EE Times

Alice Huang tied to Nvidia's biggest Chinese competitor An investigation alleges Alice Huang held stakes in Huawei-linked Chinese businesses while maintaining ties to Nvidia CEO Jensen Huang, raising national security concerns over technology transfers, corporate disclosures and potential export-control violations. CNBC

Sponsor The Gallery of Progress From desktop to laptop to data center, every leap in performance begins with a packaging decision most people will never see. Explore the rooms of the exhibition and see our range of innovative applications. Henkel AG & Co.

Technical Papers ■ Beneath the Surface: The Rise of Intelligent X-Ray Inspection ■ The Future of Flip Chip Bonding: How R-LAB and R-LTC Enable Next-Generation AI and HPC Packaging ■ Selective Alkaline Wet Etching of Al and AlCu Using a Phosphoric and Nitric Acid Free Formulation ■ Hybrid & Fusion Bonding: from Heterogeneous Integration to 3D Front-End of Line Technologies ■ Why Metal TIM Warpage Simulations Fail—and How to Fix Them ■ Oxide Reduction for Reliable Power Electronics Manufacturing ■ Bond front velocity in lubrication-mediated bonding of flexible substrates MORE TECHNICAL PAPERS

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AMD, Broadcom poised to gain from scandal roiling Nvidia Nvidia's reported leadership turmoil is lifting AMD and Broadcom shares as investors eye market-share gains. Alphabet, Samsung and Chinese chipmakers could also benefit as customers diversify suppliers and competitors advance alternative AI chip technologies. Taipei Times

Hon Hai Q3 net income surged 34% Hon Hai reported record third-quarter net profit, rising 34% year-on-year to NT$77.52 billion, driven by strong AI server demand. The company expects continued growth in AI server shipments, expanding cloud business and double-digit revenue growth next year. Taipei Times

Sponsor DIE Stacking on a Small Area Assembly process where chips are stacked on top of one another on a substrate. This vertical integration allows a compact arrangement of different circuits with different dimensions on a small area. Tresky Automation

Jensen Huang's exit from Nvidia raises critical questions about the future of AI Nvidia faces a leadership crisis as allegations surrounding CEO Jensen Huang trigger an investigation and succession uncertainty. His departure threatens investor confidence and AI market stability, despite record growth and his pivotal role in advancing AI technology. CNBC

Beyond Bandwidth: AI Inference Is Reshaping The Memory Wall AI infrastructure must balance growing memory demands as larger models and longer context windows strain capacity, bandwidth, latency, power and cost. Coordinating compute, interconnects and software is critical to efficient inference. Semiconductor Engineering

Sponsor Reduce Gold Embrittlement Risk Before Assembly Excess gold from component terminations can weaken solder joints. Explore how controlled gold removal and robotic hot solder dipping help protect assembly reliability in this technical paper. Circuit Technology Center

The Semiconductor Singularity: When AI Starts Accelerating The Silicon That Accelerates AI Agentic AI automates semiconductor engineering workflows, accelerates analysis and expands design exploration. By coordinating specialized tools while retaining human oversight and verification, AI helps engineers overcome bottlenecks and speed chip innovation. Semiconductor Engineering

Introduction To FP8 Formats: Part 1 Arm is advancing FP8 support to improve machine learning performance by reducing memory usage, power consumption and latency. Its FPMR register enables efficient switching between E4M3 and E5M2 formats, balancing precision and dynamic range across workloads. Semiconductor Engineering

Sponsor Automated X-Ray Metrology: Enhancing Quality and Efficiency in Wafer and Panel-Level Applications This paper explores how, with chips becoming smaller and mightier, automated x-ray metrology delivers game-changing quality and efficiency in wafer and panel level applications, while delving into industry trends. Nordson Test & Inspection

RISC-V For AI: Breakthrough Or Bad Idea? The AI boom is driving chip design toward parallel processing and power efficiency, increasing demand for flexible, modular, open hardware. Industry experts highlight RISC-V's growing role in customizable AI acceleration and specialized computing architectures. Semiconductor Engineering

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Samsung Eyes 2027 for 3D Cube-H Advanced Packaging Development & Hybrid Bonding Samsung targets early 2027 to develop 3D Cube-H hybrid bonding technology, enabling finer chip stacking for AI processors and HBM. The 6μm interconnect pitch could boost performance, efficiency and foundry competitiveness. TrendForce