February 20, 2026

When Cleaning Chips Isn't Clean Enough As chipmakers push into angstrom-scale nodes, contamination moves beyond visible particles to subtle interface chemistry, residues and tool-induced effects. With margins shrinking, fabs must anticipate and control latent, system-level risks that erode yield and long-term reliability. Semiconductor Engineering

Sponsor Dedicated Tool for Process Development Advanced plating capability at Uyemura Tech Center: Process Development, UBM, pilot production. ENIG, ENEPIG, EPIG/EPAG, RAIG immersion gold; all substrates. On-site analysis. Uyemura

VIEWPOINT 2026: Abdul Lateef, CEO, Plasma-Therm LLC As we enter 2026, Plasma-Therm remains committed to enabling advanced semiconductor manufacturing companies and research institutions to achieve breakthroughs in efficiency, precision, and innovation. Our systems and software continue to play a critical role in supporting our customer partners ... Plasma-Therm LLC

Peer viewpoint: semiconductor innovation for telecommunication networks Telecom networks are evolving rapidly to handle higher speeds & volumes. Henkel surveyed 170 semiconductor leaders to reveal how performance, reliability & advanced integration are driving next-gen infrastructure. Technical Paper

Sponsor Cu Pillar Flip Chip Cleaning Evaluating appropriate chemistries to remove WS Flux residues and refining cleaning processes can meet challenges associated with producing Cu Pillar flip chips to improve reliability. KYZEN

Quantum's big leap puts data centers in the spotlight Quantum computing is racing toward commercial use, with companies like Microsoft targeting data center integration by 2029. Surging investment, government backing and hyperscaler support drive adoption, as hybrid systems, efficiency gains & quantum-safe security take shape. CNBC

Why Indium Oxide Chips Are Getting So Much Attention Researchers advance monolithic 3D integration using indium-based oxide semiconductors, fine-tuning composition, annealing and dielectrics to control threshold voltage and mobility. They also probe oxygen vacancies and hydrogen's role in bias instability to boost CMOS reliability. Semiconductor Engineering

Sponsor Contamination Control Balazs™ provides technical expertise in identifying and controlling Airborne Molecular Contamination (AMC) and Surface Molecular Contamination (SMC) for improving process and product yields. Balazs Nanoanalysis

Technical Papers Alpha Particle Emissions: An Overlooked Risk for Soft Errors in Advanced Packaging Revolutionizing IC Packaging with High-Density RDL Technology EOTPR Fine pitch probing for die-to-die interconnect failure analysis in chiplet devices Die-on-Tab for Compound Semiconductors: Enabling Advanced RF Power Systems Package Assembly Design Kits: The Future of Advanced Package Design Novel Molded FCBGA Package Platform For Highly Reliable Automotive Applications Eliminating Interfacial Delamination in High-Power Automotive Devices MORE TECHNICAL PAPERS

Sponsor High Density I/C Substrates – 50um "Stay Flat" CORES - USA FAB Interposers/High Layer Counts – Low Loss/Low CTE Materials – 20µm Dielectrics /12µm Traces - ITAR Registered. Learn more. Advanced Component Labs, Inc.

The U.S. and China Are Pursuing Different AI Futures Global AI investment is set to hit $700 billion this year, fueled by claims of a U.S.–China arms race. However, experts say the U.S. targets AGI breakthroughs, while China prioritizes applying AI to drive productivity, industrial growth, and economic stability. IEEE Spectrum

US and China can again find common ground – in AI's risks At the Asia Leaders Series in Zurich, speakers reframed US-China rivalry, arguing that artificial intelligence—not traditional security threats—could become both a shared global risk and opportunity. Participants urged cooperation on AI governance, energy use and safety standards. South China Morning Post

Sponsor Die-on-Tab for Compound Semiconductors This white paper explains why die-on-tab is critical for GaN and GaAs RF power devices, improving heat dissipation, reliability, and system life. Download now. StratEdge Corporation

Chinese tech companies progress 'remarkable,' OpenAI's Altman tells CNBC Sam Altman praised Chinese tech firms' rapid AI progress as China intensifies its AGI race with the U.S. OpenAI pursues aggressive growth, fundraising, and U.S. ad tests in ChatGPT while monitoring state-backed Chinese competition. CNBC

Redefining Backside Metallization: Low‑Temperature Solutions For HDFO And S‑SWIFT Designs As AI and HPC chips accelerate 2.5D integration and high-density fan-out packaging, researchers advance a low-temperature backside metallization process for S-SWIFT modules that preserves solder TIM coverage, boosts reliability, and avoids aluminum spiking. Semiconductor Engineering

Sponsor Copper Stud & CTE Nano Tech Underfill AIT's proven flip-chip and BGA multi-level underfills offer both 18 ppm/°C copper CTE matching fine-pitch & nano-pitch with 10 µm & 0.3 µm respective cut-off particles. AI Technology, Inc.

Understanding Within-Wafer Variations: A Virtual Fabrication Approach The blog explains how within-wafer variations affect chip performance and yield. Engineers use a digital twin and 2,000-run Monte Carlo simulations to model deposition and etch differences, predict gradients across wafers, and optimize gate oxide and high-k contact areas. Semiconductor Engineering

Laser Arrays May Simplify Co-Packaged Optics Co-packaged optics pushes photonic and electronic IC integration & a new monolithic laser array now brings hundreds of software-programmable lasers inside the system. The approach simplifies alignment, cuts components, boosts reliability & advances Lightmatter's photonic interconnects. Semiconductor Engineering

Sponsor Die Bonding Made Easy The DL Technology X-Form needles are custom manufactured for conductive epoxy dispensing in die bonding applications. Each needle is machined using DL's patented EZ-FLO. DL Technology

Leading At Light Speed: What Makes Photonics Leadership Different As transistor switching generates heat and stalls Moore's Law, chipmakers turn to photonics, which transmits data without thermal buildup. Silicon's limits force reliance on III-V materials like indium phosphide and gallium arsenide, increasing manufacturing complexity & supply chain risk. Semiconductor Engineering

Sponsor Highly Thermally & Electrically Conductive TLPS via Filing Paste New filing highlights advanced sintered metal paste enabling faster installation, superior heat dissipation, higher conductivity, and reliable thermal drain performance without long processing cycles. Ormet TLPS