May 19, 2026

Confusion Grows With More Interconnect Options and Tradeoffs As AI workloads surge, chip engineers juggle expanding interconnect options to move data across chiplets, packages, and systems. They adopt layered mixed protocols to balance speed, power efficiency, compatibility, and evolving industry standards. Semiconductor Engineering

Sponsor Cleaning Silicone and Hydrocarbon Residue Using Atmospheric Plasma Residue from dicing tape and silicone trays can hinder chip bonding. ONTOS effectively cleans surfaces before bonding. Read more. Ontos

Intel CEO says foundry business is gaining momentum as customer interest grows Intel CEO Lip-Bu Tan said its foundry business is improving, driven by 18A yield gains and rising customer interest. He expects multiple commitments and aims to compete with TSMC while advancing U.S. chip manufacturing ambitions. CNBC

Eliminating Interfacial Delamination in High-Power Automotive Devices This study demonstrates that coating power devices with APTES adhesion promoter after wire bonding eliminates interfacial delamination, providing a simpler alternative to lead frame roughening technology. Technical Paper

Sponsor Die-on-Tab for Compound Semiconductors This white paper explains why die-on-tab is critical for GaN and GaAs RF power devices, improving heat dissipation, reliability, and system life. Download now. StratEdge Corporation

Researchers built a switch 1,000 times faster than today's AI chips, and it barely generates any heat Researchers at University of Tokyo developed a spintronic magnetic switch using Mn3Sn that operates up to 1,000 times faster than AI accelerators, using far less energy and heat, enabling picosecond switching and promising more efficient future computing hardware. TechSpot

First Intel Wildcat Lake Laptops Near Launch; Reportedly Built on 18A, Taking Aim at Apple's MacBook Neo Intel's first Wildcat Lake Core Series 300 laptops may arrive next week, led by Honor and ASUS models. The AI-ready chips target entry-level PCs with all-day battery life, lower power use, and faster productivity and AI graphics performance. TrendForce

Sponsor DIE Stacking on a Small Area Assembly process where chips are stacked on top of one another on a substrate. This vertical integration allows a compact arrangement of different circuits with different dimensions on a small area. Tresky Automation

Technical Papers Automated X-Ray Metrology: Enhancing Quality and Efficiency in Wafer and Panel-Level Applications Alpha Particle Emissions: An Overlooked Risk for Soft Errors in Advanced Packaging Revolutionizing IC Packaging with High-Density RDL Technology EOTPR Fine pitch probing for die-to-die interconnect failure analysis in chiplet devices Die-on-Tab for Compound Semiconductors: Enabling Advanced RF Power Systems Package Assembly Design Kits: The Future of Advanced Package Design Novel Molded FCBGA Package Platform For Highly Reliable Automotive Applications MORE TECHNICAL PAPERS

Sponsor How to Cold Bump Pull? Learn how to perform an optimal Cold Bump Pull test on solder balls using tweezers. This guide covers test method settings and failures modes for CBP all types of bump testing. xyztec

China's Rare Earth Compound Exports Fell 17% in Value; Alternative Supply Chains Gain Momentum China's rare earth curbs pushed companies to stockpile, recycle, redesign products, and build alternative supply chains. As exports fell, firms like Lynas, Neo Performance, and Energy Fuels expanded refining and magnet production outside China. TrendForce

Google I/O primer: Alphabet's AI showcase is its chance to wow Wall Street Alphabet shares have surged 140% as investors bet on its AI comeback, but Google must prove its roadmap at I/O. The company will showcase Gemini upgrades and agentic tools spanning search, cloud, Android, and commerce to challenge rivals. CNBC

Sponsor Fix Pad-to-Component Alignment Issues Without Rebuilding the Board Pad and component mismatches can create assembly challenges, reliability concerns, and costly production delays. Learn effective rework techniques. Circuit Technology Center

Canada Spins Off Photonics Lab Canada announced plans to spin off the Canadian Photonics Fabrication Center (CPFC) into a commercial entity, aiming to attract investment and jobs. The move shifts the NRC-run compound semiconductor facility toward an industry-driven model while maintaining gov't ownership stake. EE Times

ASML, Tata Electronics Partner for India's First 300-mm Semiconductor Fab ASML signed a strategic partnership with Tata Electronics to supply advanced lithography tools and expertise for India's first 300-mm semiconductor fab in Dholera, Gujarat, supporting an facility producing chips for automotive, mobile, IoT, and AI applications. EE Times

Sponsor 1 of 10 Applications: UV Curing Swiss made die bonders from Tresky handle bonding processes with fast curing UV adhesives easily. A high-power UV source attached to the dispenser takes care of the curing step. Dr. Tresky AG

How Elon Musk and Sam Altman went from besties to bitter rivals Musk and Sam Altman's once-close partnership over OpenAI has collapsed into a high-profile courtroom battle, as Musk alleges the startup abandoned its nonprofit mission, enriched insiders, and betrayed founding promises, while both sides race in the AI commercialization boom. CNBC

Weekly news roundup: TSMC faces AI supply strain as Samsung, Intel, and Apple test foundry alternatives AI-driven chip demand is pressuring TSMC as tech firms turn to Samsung and Intel to diversify supply chains despite yield and cost hurdles. Cyient, Hanwha, and Intel are also expanding packaging, foundry capacity, and chip ecosystems worldwide. Digitimes

Sponsor AEC Grade-0 and MSL Level-1 Conductive Paste & Film Adhesives 240° Tg and ultra-high thermal stability for AEC Grade-0 applications. Proven rapid and snap curing die-attach paste for ultimate productivity. AI Technology, Inc.

Semiconductor Society Warns Samsung Strike Could Devastate Korea's Chip Ecosystem Korean Society of Semiconductor Engineering urges Samsung Electronics & its union to cancel a planned general strike & resume talks, warning of a devastating impact on Korea's semiconductor ecosystem, suppliers, research & talent pipeline amid rising global AI competition. Seoul Economic Daily

Sponsor Fusion and Hybrid Bonding Experts EVG's industry-leading process solutions, expertise and HI Competence Center accelerate the development and implementation of heterogeneous integration technology. EV Group