May 29, 2026

Chiplets, Ecosystems, and Europe's Post-Fab Semiconductor Strategy Europe is shifting its semiconductor strategy from building fabs to strengthening the full chip ecosystem. Industry leaders back Chips Act 2.0, chiplets, and heterogeneous integration to boost design, interoperability, and system-level innovation. EE Times

Sponsor No more cartridge exchanges The unique Revolving Measurement Unit (RMU) houses up to 6 sensors of any type that enable continuous pull/push and shear testing up to 200 kgf. Learn more. xyztec

This is the greatest time ever for semiconductors, says CEO of key equipment supplier Applied Materials CEO Gary Dickerson said the semiconductor industry is entering its strongest era driven by surging AI demand, with sustained growth visibility into 2027–28, expanded capacity investments and continued momentum in advanced chip manufacturing equipment. CNBC

Automated X-Ray Metrology: Enhancing Quality and Efficiency in Wafer and Panel-Level Applications This paper explores how, with chips becoming smaller and mightier, automated x-ray metrology delivers game-changing quality and efficiency in wafer and panel level applications, while delving into industry trends. Technical Paper

Sponsor Is copper sintering the future of WBG semiconductors? Silver dominates today, but copper is catching up fast. Explore the cost, reliability, and sustainability shifts reshaping GaN and SiC die attach technology. Henkel AG & Co.

Focused light raises 2D semiconductor current up to 63-fold Researchers at DGIST developed a laser-assisted microlens method to precisely tune defects in MoS₂, boosting transistor on-current up to 63 times and mobility 51 times, enabling low-damage, atomic-level doping for next-generation 2D semiconductor chips applications. Nanowerk

AI in Design Verification: From Experimentation to Measurable Capability AI in design verification is shifting from concept to real-world deployment, helping engineers with regression triage, debug, coverage analysis, and log summarization. Teams now measure success through risk reduction, traceability, and stronger verification efficiency. EE Times

Sponsor AIT ORMET® TLPS for Proven Reliability AIT ORMET® TLPS is proven for outstanding reliability for High and Ultra High-Density Interconnection and high temperature build-up Layer Interconnection beyond 175°C Ormet® TLPS

Technical Papers Automated X-Ray Metrology: Enhancing Quality and Efficiency in Wafer and Panel-Level Applications Alpha Particle Emissions: An Overlooked Risk for Soft Errors in Advanced Packaging Revolutionizing IC Packaging with High-Density RDL Technology EOTPR Fine pitch probing for die-to-die interconnect failure analysis in chiplet devices Die-on-Tab for Compound Semiconductors: Enabling Advanced RF Power Systems Package Assembly Design Kits: The Future of Advanced Package Design Novel Molded FCBGA Package Platform For Highly Reliable Automotive Applications MORE TECHNICAL PAPERS

Sponsor Nordson Sight™ Nordson Sight™ delivers scalable SPC with traceability, rapid setup, intuitive interface, and powerful analysis tools for improved manufacturing yields. Nordson Test & inspection

Finding Success in Industry as a Chip Designer An ASIC designer describes the shift from academia to industry, where silicon IP dominates chip development. He highlights how risk-averse economics, strict schedules, system integration, and rigorous verification now drive modern semiconductor design. IEEE Spectrum

Swapping Out Chiplets: I/Os Vs. Compute Chiplet architectures enable modular chip design by letting engineers reuse core compute while selectively swapping I/O, memory, or protocol blocks. Driven by AI and HPC demands, this approach reduces costly respins and aligns performance with rapidly evolving standards. Semiconductor Engineering

Sponsor OntosIS Atmospheric Plasma System The ONTOS Plasma Head is available for integration into third party equipment. The Plasma Curtain is available in several widths to enable optimization of the gas consumption on smaller devices. Ontos Equipment Systems

Toward Agentic Verification Agentic verification is reshaping semiconductor design by using AI agents to automate verification flows, generate tests, debug failures & accelerate coverage closure. Engineers still must control costs, address analog limitations, manage context gaps & maintain human oversight. Semiconductor Engineering

Observability Is Essential For Modern Silicon In-silicon observability is gaining importance for managing performance, reliability & security in advanced chips. Experts from Arteris, Baya Systems, Cadence, Keysight EDA, Movellus, Siemens EDA, Synopsys & Vinci discuss how on-die visibility improves debugging & system optimization. Semiconductor Engineering

Sponsor Die-on-Tab for Compound Semiconductors This white paper explains why die-on-tab is critical for GaN and GaAs RF power devices, improving heat dissipation, reliability, and system life. Download now. StratEdge Corporation

Using SystemC TLM Modeling To Solve AI Data Movement Challenges AI chip performance depends on efficient data movement, not just compute metrics. Engineers use SystemC TLM modeling to simulate NoC behavior early, identify bottlenecks, and refine architectures through iterative feedback, improving bandwidth, latency, and reducing design risk. Semiconductor Engineering

Faster Verification Debug With AI Agentic verification is transforming chip design as AI agents automate test generation, debug failures, orchestrate verification flows, and speed coverage closure. Engineers still must manage costs, analog gaps, context limits, and human oversight in practice. Semiconductor Engineering

Sponsor Amkor's System in Package (SiP) Solutions Amkor's SiP technology is an ideal solution in markets that demand a smaller size with increased functionality. Learn more. Amkor Technology, Inc.

Wafer-Scale vs. Chiplets: The New War? Part 1 Cerebras' IPO highlights investor backing for wafer-scale computing, as it abandons chiplets for a single silicon surface. Its SwarmX architecture and novel memory, power, and yield solutions enable ultra-fast data movement, challenging conventional AI chip design limits. Semiconductor Engineering

Sponsor TIM1 for EV Battery Thermal Management AIT's thermal adhesives, grease-gels, & gum-pads offer proven thermal dissipation for a balance of strength, rework ability, & recyclability of EV battery packs. AI Technology, Inc.