August 19, 2026

Taiwan has 3-5 year window to build non-China robot supply chain Taiwan and other technology democracies have three to five years to build non-China robotics supply chains. DSET says Taiwan can leverage chip and electronics strengths while policies address cybersecurity, manufacturing and investment challenges. Taipei Times

Sponsor AIT ORMET® TLPS for Proven Reliability AIT ORMET® TLPS is proven for outstanding reliability for High and Ultra High-Density Interconnection and high temperature build-up Layer Interconnection beyond 175°C Ormet® TLPS

Marvell Targets AI Bottlenecks with Memory-Disaggregation Portfolio Marvell Technology unveiled memory infrastructure spanning PCIe storage, CXL expansion and optical fabrics, helping hyperscalers ease bottlenecks, pool memory and boost AI inference. Its portfolio scales memory across servers, racks and data centers. EE Times

Peer viewpoint: semiconductor innovation for telecommunication networks Telecom networks are evolving rapidly to handle higher speeds & volumes. Henkel surveyed 170 semiconductor leaders to reveal how performance, reliability & advanced integration are driving next-gen infrastructure. Technical Paper

Sponsor Accurate Corner Fill Inspection SQ3000™ Nordson Test & Inspection advances industry software with AI-driven algorithms and SQ3000's MRS technology, delivering unmatched accuracy by eliminating reflections for precise, high-quality measurement applications. Nordson Test & Inspection

Nvidia's AI moat is shifting from chips to capital Nvidia is leveraging its massive cash reserves to sustain AI infrastructure demand, backing OpenAI's Ohio data center with up to $105 billion and investing across the ecosystem. The strategy strengthens Nvidia’s competitive moat while extending the AI investment cycle. CNBC

Why Standardized Interfaces Are Critical to Accelerating Humanoid Development Humanoid robots will increasingly rely on centralized computing, powerful SoCs and NPUs to process massive sensor data in real time. MIPI's new group will explore interfaces that improve synchronization, reduce power, simplify wiring and lower costs. EE Times

Sponsor 1 of 10 Applications: UV Curing Swiss made die bonders from Tresky handle bonding processes with fast curing UV adhesives easily. A high-power UV source attached to the dispenser takes care of the curing step. Dr. Tresky AG

Technical Papers 5X Faster Die Sorting Accelerates U.S. Semiconductor Manufacturing A New Optical Ball Grid Array Package Development for Automotive Optical Sensor Automated X-Ray Metrology: Enhancing Quality and Efficiency in Wafer and Panel-Level Applications Alpha Particle Emissions: An Overlooked Risk for Soft Errors in Advanced Packaging Revolutionizing IC Packaging with High-Density RDL Technology EOTPR Fine pitch probing for die-to-die interconnect failure analysis in chiplet devices Die-on-Tab for Compound Semiconductors: Enabling Advanced RF Power Systems MORE TECHNICAL PAPERS

Sponsor Premier Semiconductor Packaging Event 3 days featuring 5 technical tracks, 100 exhibitors, panels, posters, professional development, along with strong industry engagement. Keynotes from Qualcomm, Marvell, and Cerebras. IMAPS 2026 on September 28. IMAPS

Semiconductor Earnings Roundup: Revenue, Growth and Takeaways Chip earnings surged, with 11 companies posting triple-digit growth and nearly all 80 reporting gains. AI infrastructure, memory, advanced packaging, testing and leading-edge manufacturing drove gains, while consumer and handset markets stayed mixed. Semiconductor Engineering

Research Bits: Aug. 18 Researchers developed memristive and neuromorphic platforms that boost edge AI, achieving 95.24% language identification accuracy. Devices improve time-series processing and combine long- and short-term memory, reaching 96.1% character recognition. Semiconductor Engineering

Sponsor Temporary Bonding Materials Brewer Science offers temporary bonding solutions with high adhesion and high thermal stability (≥ 400˚C) to enable thinning ≤ 50 µm. Brewer Science

Chiplets Offer a Scalable Compute Strategy for Software-defined Vehicles Automakers are moving to centralized vehicle computing as workloads rise, but monolithic SoCs face AI, cost and power limits. Chiplets provide scalable compute, enable software reuse and flexible configurations, and boost performance across vehicles. EE Times Asia

Memory Stocks Surge as AI Demand Fuels Supply Constraints Memory semiconductor stocks are rebounding as investors regain confidence in sustained AI data-center demand. SanDisk, Micron, SK hynix and Samsung rally on shortages, stronger AI revenue, U.S. chip curbs and tight supplies through 2027-2028. The Chosun

Sponsor Plasma Treatment during FOWLP Optimizes Performance and Costs Fan-out Wafer-Level (FOWLP) & Fan-out Panel-Level (FOPLP) benefit from plasma treatment, which ensures surfaces are contamination-free. Read more Nordson Electronics Solutions

TSMC Follows the Money: More Than 75% of Its Revenue Now Comes From U.S. Customers TSMC's American expansion reflects more than geopolitical pressure. With U.S. customers generating over 75% of revenue, Arizona fabs bring production closer to key clients, strengthen supply resilience and demonstrate growing commercial value despite higher manufacturing costs. SemiVision

The Physics That Killed the Monolithic Chip Major chipmakers are shifting from monolithic processors as poor yields and stalled SRAM scaling raise costs. Chiplets boost manufacturing efficiency, while 3D stacking and hybrid bonding pack logic and memory closer for faster, greener computing. Medium

Sponsor Die-to-Wafer Bonding Simplified Researchers developed a plasma Die-to-Wafer bonding process, eliminating complex carrier wafers & costly vacuum systems, enhancing 3DIC & integrated photonics applications. Ontos Equipment Systems

Copper's Grip on AI Scaling is Starting to Slip Optical interconnects are reshaping AI data-center fabrics as copper reaches limits inside racks. Scale-up now extends across racks, with fiber enabling longer links while UALink preserves single-hop connectivity and memory semantics to reduce latency and improve GPU utilization. Semiconductor Engineering

Sponsor IR Layer Release Technology for 3D Packaging and Logic Scaling Ultra-thin layer transfer from silicon carriers with nanometer precision using an IR laser and inorganic release layers revolutionizes 3D packaging & logic scaling. EV Group